I assume you are asking about how to reduce the noise (randomness of ADC readings) when using the ADC built into the FMD PLC.
As you are aware, the PLC ADC inputs are "single ended". This means that signal voltage that you are measuring with the ADC is referenced to the 0V at the ADC converter on the PLC circuit board. If this 0V reference is at a different voltage than the 0V at the LVDT then you will have an ADC measurement error. If this voltage difference is not, and it never is, a constant voltage, then you may observe many different ADC readings for a constant input.
As a simple experiment, take a good DVM and measure the voltage between the 0V terminal on the PLC power supply and the 0V ADC reference (on the ADC connector). Use the DVM. To measure both the AC and the DC voltages. If you measure 0.000V (AC and DC) you are lying. If you measure anything else then you are observing part of the noise problem.
The problem gets a bit more complicated because I'll bet that your LVDTs are being powered by a separate power supply and there may be a signal conditioner between the LVDTs and the PLC.
You can repeat the DVM measurement and measure from the PLC ADC 0V reference to the LVDT 0V reference. If you see either AC OR DC voltages other than 0.000, then this is part of the random ADC readings.
Reworking the wiring to get every thing that should be 0V to actually be 0V will solve much of the problem.
If the noise still exists, then you enter into the world of shielding and filtering. Focus on the signal wiring between the LVDT and the ADC.
You can do a lot of filtering in the digital domain. Sample the ADC every 10ms and keep a running average. There is software support in the PLC to simplify this task.
Oh, I forgot to ask...how important are the least few digits? What would happen to your system if you simply discarded the least significant 3 bits?
A = Adc(1) And &hfffffff8 ' force 3 LSBs to 0
Problem solved!
Good luck,
Gary D