Rising Edge Coil

[Philippe Parmentier]

Greettings all,

I getting lost with rising edge coil. As far as i've understood, when the coil is going from off to on, it execute the condition only one even if the conditions continue to be on.

In my example, is relay1 rise for off to on, it should execute once the Latch of itself.

and so the relay 1 should stay on due to the latch.

And that behaviour can be seen on the out2 and that's working fine...

but when applying that on the same relay it doesn't work and seems to work like a regular relay but not latch relay.

Can someone explain me why?

[garysdickinson]

I think that what you are trying to do violates the rules of the PLC ladder logic.  

In your example, you do not show how relay1 is controlled.  If you add one more rung to the logic, that connects an INPUT to relay1 so that you can affect the state of relay1, you will get a warning message from i-TRiLOGI:

     Relay "relay1" has already been energized!

I think that the problem that you are having with the Rising Edge Contact is that you are attempting to define the state of relay1  two different ways in the same PLC program:

[*]The edge contact attempts to make relay1 TRUE for a single scan through the logic
[*]The latch function attempts to make relay1 TRUE.
[/list]
If you are attempting to set a RELAY on a rising edge event, you might want to consider constructs that will work with the PLC.

The following ladder gives the most common ways of getting this done:

Gary d

[Philippe Parmentier]

Thanks you Gary,

I was just trying to have as much efficient ladder and tbasic code, because i'm about 500 ladder logic entries, plus 1000 lines of basic an by writing efficient code I keep a good performance...

I was just trying to have in a rung lookin like the regular PLC seal logic but inside a step rung having differents ways of getting a state relay and with the rising edge, on the same relay (like the same relay on the regula seal logic) i avoid having extra code to set an 'intermediate' relay ...
That's certainly comming out of by pure IT background.

[garysdickinson]

PhilippeP,

I like your thinking.  I did embedded firmware for many years before getting into ASIC design.

On the TriLOG PLCs, ladder logic executes the fastest.  I try do as much in ladder logic as is possible.  The biggest problem that I run into with ladder logic, is that it can be difficult to write it in a way that makes sense to me, latter.  

I have found that finite element state machines can be very easily implemented with the PLC.  I use this approach for most of my sequential or process related coding.  This results in very efficient,  and easily maintained PLC code.  

If you have not got into using the PLC Sequencer mechanism and FSM (finite state machines) you are probably working way too hard.

Good luck,

Gary D.